The present invention relates to a one-chip microcomputer.
In the early seventies, a 4-bit microprocessor, such as Intel 4004, which was also called a microcomputer, comprised a central processing unit (abbreviated CPU) on a single chip. In recent years, however, LSI (Large Scale Integration) technology has been developed with the result that highly-integrated one-chip microcomputers have been developed. A one-chip microcomputer generally comprises a CPU, a random-access memory (abbreviated RAM), a read-only memory (abbreviated ROM), input/output (abbreviated I/O) ports, a clock generator and the like on a single chip. In other words, such a one-chip microcomputer has full computer functions on a single chip and, accordingly, cost-performance thereof can be greatly improved.
In a one-chip microcomputer, since the CPU and the RAM are connected by interconnections within the chip, data transfer between the CPU and RAM cannot generally be monitored from the exterior. As a result, it is difficult to test the chip and to detect a malfunction therein. Therefore, it is necessary to transfer data from the RAM to the exterior or vice versa, in order to monitor the CPU operation state.
Several approaches may be taken to meet the above-mentioned requirement for one-chip microcomputers. One approach is to cause the CPU to perform data transfer between the RAM and the exterior. In this case, however, the load on the CPU becomes large and, accordingly, the throughput of the microcomputer is reduced. In addition, instruction sequences (programs) are fixed in the ROM and, therefore, the operation state of the CPU is unclear. As a result, it is difficult to access a desired area of the RAM by the CPU. Another approach is to use direct memory access (abbreviated DMA). That is, under the control of a direct memory access controller (abbreviated DMAC) which is set by the CPU, the direct transfer of data is provided between the RAM and the I/O ports. In this case, however, since specialized I/O ports for the DMA operation mode are necessary, the number of terminals (pins) connected to the I/O ports is increased. For example, in the case of an 8-bit parallel transfer system, eight terminals are necessary, which is disadvantageous in practice. In addition, such additional terminals are generally necessary only during the manufacture of the microcomputer.